Conventional semiconductor device packages include multiple semiconductor dice that are stacked, partially overlapping, side-by-side, or on opposite sides of an interposer substrate. Such packages have enabled the semiconductor industry to fit more computer memory or processing capabilities into a smaller physical area, compared to assemblies of multiple semiconductor devices each including only one semiconductor die.
Some conventional semiconductor device packages include two semiconductor dice stacked in a face-to-face arrangement (i.e., with active surfaces facing each other). Each of the two semiconductor dice may include a unique-to-each-die so-called “redistribution layer,” commonly termed an “RDL,” of conductive traces on an active surface of each semiconductor die to route respective electrical contacts of each of the two semiconductor dice to locations on the semiconductor dice, such as proximate outer edges of the semiconductor dice, that are convenient for bonding wires or other electrical access elements extending to an interposer substrate or to higher-level packaging. In other arrangements, conductive elements commonly referred to as “through silicon vias” or “TSVs” form an electrical pathway through a thickness of at least one of the two semiconductor dice for electrically accessing one or both of the two semiconductor dice. In either case, forming the redistribution layers or the TSVs requires additional processing operations, time, and cost.